Symbol: regCPG_UTCL1_STATUS
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h
4540
#define regCPG_UTCL1_STATUS 0x1f54
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h
4764
#define regCPG_UTCL1_STATUS 0x1f54
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
3513
#define regCPG_UTCL1_STATUS 0x1f54
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h
3820
#define regCPG_UTCL1_STATUS 0x1f54
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h
3764
#define regCPG_UTCL1_STATUS 0x1f54
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h
663
#define regCPG_UTCL1_STATUS 0x11b4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h
3130
#define regCPG_UTCL1_STATUS 0x11b4