drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h

6026

#define mmVGA_CACHE_CONTROL 0xcb

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h

6103

#define mmVGA_CACHE_CONTROL 0xcb

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h

7777

#define mmVGA_CACHE_CONTROL 0xcb

drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h

572

#define mmVGA_CACHE_CONTROL 0x000b

drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h

4385

#define mmVGA_CACHE_CONTROL 0x00CB

drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h

5143

#define mmVGA_CACHE_CONTROL 0xcb

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h

406

#define mmVGA_CACHE_CONTROL 0x000b

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h

50

#define mmVGA_CACHE_CONTROL 0x000b

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h

110

#define mmVGA_CACHE_CONTROL 0x000b

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h

32

#define mmVGA_CACHE_CONTROL 0x000b

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_1_offset.h

166

#define mmVGA_CACHE_CONTROL 0x000b

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h

50

#define mmVGA_CACHE_CONTROL 0x000b

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h

35

#define mmVGA_CACHE_CONTROL 0x000b