Symbol: mmUVD_RB_WPTR_BASE_IDX
drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h
103
#define mmUVD_RB_WPTR_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h
225
#define mmUVD_RB_WPTR_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h
937
#define mmUVD_RB_WPTR_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h
560
#define mmUVD_RB_WPTR_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h
890
#define mmUVD_RB_WPTR_BASE_IDX 1