drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h

84

#define mmUVD_RBC_IB_SIZE_UPDATE 0x3df1

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h

68

#define mmUVD_RBC_IB_SIZE_UPDATE 0x3DF1

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h

82

#define mmUVD_RBC_IB_SIZE_UPDATE 0x3df1

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h

88

#define mmUVD_RBC_IB_SIZE_UPDATE 0x3df1

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h

104

#define mmUVD_RBC_IB_SIZE_UPDATE 0x3df1

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h

774

#define mmUVD_RBC_IB_SIZE_UPDATE 0x02b1

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h

783

#define mmUVD_RBC_IB_SIZE_UPDATE 0x02dd

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h

1167

#define mmUVD_RBC_IB_SIZE_UPDATE 0x02dd