Symbol: mmUVD_JRBC_RB_RPTR_BASE_IDX
drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h
105
#define mmUVD_JRBC_RB_RPTR_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h
229
#define mmUVD_JRBC_RB_RPTR_BASE_IDX 1
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h
139
#define mmUVD_JRBC_RB_RPTR_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h
154
#define mmUVD_JRBC_RB_RPTR_BASE_IDX 0
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h
352
#define mmUVD_JRBC_RB_RPTR_BASE_IDX 0