drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

38

#define mmUVD_DPG_LMA_CTL_BASE_IDX regUVD_DPG_LMA_CTL_BASE_IDX

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

43

#define mmUVD_DPG_LMA_CTL_BASE_IDX regUVD_DPG_LMA_CTL_BASE_IDX

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

42

#define mmUVD_DPG_LMA_CTL_BASE_IDX regUVD_DPG_LMA_CTL_BASE_IDX

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

43

#define mmUVD_DPG_LMA_CTL_BASE_IDX regUVD_DPG_LMA_CTL_BASE_IDX

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h

37

#define mmUVD_DPG_LMA_CTL_BASE_IDX 1

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h

395

#define mmUVD_DPG_LMA_CTL_BASE_IDX 1

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h

410

#define mmUVD_DPG_LMA_CTL_BASE_IDX 1

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h

686

#define mmUVD_DPG_LMA_CTL_BASE_IDX 1