drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5233

#define mmSPI_RESOURCE_RESERVE_CU_9 0x1f85

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

4892

#define mmSPI_RESOURCE_RESERVE_CU_9 0x1f85

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

2751

#define mmSPI_RESOURCE_RESERVE_CU_9 0x11e5

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

2979

#define mmSPI_RESOURCE_RESERVE_CU_9 0x11e5

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

2935

#define mmSPI_RESOURCE_RESERVE_CU_9 0x11e5

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

1440

#define mmSPI_RESOURCE_RESERVE_CU_9 0x31e5

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

1457

#define mmSPI_RESOURCE_RESERVE_CU_9 0x31e5

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

1636

#define mmSPI_RESOURCE_RESERVE_CU_9 0x31e5

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

1604

#define mmSPI_RESOURCE_RESERVE_CU_9 0x31e5