drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

9077

#define mmRLC_SPM_RING_RDPTR 0x3c85

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

8758

#define mmRLC_SPM_RING_RDPTR 0x3c85

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

5881

#define mmRLC_SPM_RING_RDPTR 0x3c9d

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

6111

#define mmRLC_SPM_RING_RDPTR 0x3c9d

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

6071

#define mmRLC_SPM_RING_RDPTR 0x3c9d

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

1359

#define mmRLC_SPM_RING_RDPTR 0xdc9d

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

1372

#define mmRLC_SPM_RING_RDPTR 0xdc9d

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

1517

#define mmRLC_SPM_RING_RDPTR 0xdc9d

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

1520

#define mmRLC_SPM_RING_RDPTR 0xdc9d