drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h

6016

#define mmVGA_RENDER_CONTROL 0xc0

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h

6093

#define mmVGA_RENDER_CONTROL 0xc0

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h

7767

#define mmVGA_RENDER_CONTROL 0xc0

drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h

554

#define mmVGA_RENDER_CONTROL 0x0000

drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h

4400

#define mmVGA_RENDER_CONTROL 0x00C0

drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h

5133

#define mmVGA_RENDER_CONTROL 0xc0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h

388

#define mmVGA_RENDER_CONTROL 0x0000

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h

32

#define mmVGA_RENDER_CONTROL 0x0000

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h

88

#define mmVGA_RENDER_CONTROL 0x0000

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h

14

#define mmVGA_RENDER_CONTROL 0x0000

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_1_offset.h

148

#define mmVGA_RENDER_CONTROL 0x0000

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h

32

#define mmVGA_RENDER_CONTROL 0x0000

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h

17

#define mmVGA_RENDER_CONTROL 0x0000