drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h

68

#define mmUVD_VCPU_CNTL 0x3d98

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h

94

#define mmUVD_VCPU_CNTL 0x3D98

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h

66

#define mmUVD_VCPU_CNTL 0x3d98

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h

72

#define mmUVD_VCPU_CNTL 0x3d98

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h

88

#define mmUVD_VCPU_CNTL 0x3d98

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h

190

#define mmUVD_VCPU_CNTL 0x0598

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h

376

#define mmUVD_VCPU_CNTL 0x0598

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h

658

#define mmUVD_VCPU_CNTL 0x0258

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h

729

#define mmUVD_VCPU_CNTL 0x0156

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h

1105

#define mmUVD_VCPU_CNTL 0x0156