drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h

71

#define mmUVD_RBC_IB_SIZE 0x3da2

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h

67

#define mmUVD_RBC_IB_SIZE 0x3DA2

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h

69

#define mmUVD_RBC_IB_SIZE 0x3da2

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h

75

#define mmUVD_RBC_IB_SIZE 0x3da2

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h

91

#define mmUVD_RBC_IB_SIZE 0x3da2

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h

196

#define mmUVD_RBC_IB_SIZE 0x05a2

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h

382

#define mmUVD_RBC_IB_SIZE 0x05a2

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h

676

#define mmUVD_RBC_IB_SIZE 0x0262

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h

781

#define mmUVD_RBC_IB_SIZE 0x02dc

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h

1165

#define mmUVD_RBC_IB_SIZE 0x02dc