drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h

93

#define mmUVD_POWER_STATUS 0x38fc

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h

65

#define mmUVD_POWER_STATUS 0x38FC

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h

91

#define mmUVD_POWER_STATUS 0x38fc

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h

103

#define mmUVD_POWER_STATUS 0x38c4

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h

119

#define mmUVD_POWER_STATUS 0x38c4

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h

28

#define mmUVD_POWER_STATUS 0x00c4

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h

32

#define mmUVD_POWER_STATUS 0x00c4

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h

384

#define mmUVD_POWER_STATUS 0x0004

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h

399

#define mmUVD_POWER_STATUS 0x0004

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h

667

#define mmUVD_POWER_STATUS 0x0004