drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h

54

#define mmUVD_MP_SWAP_CNTL 0x3d6f

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h

60

#define mmUVD_MP_SWAP_CNTL 0x3D6F

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h

52

#define mmUVD_MP_SWAP_CNTL 0x3d6f

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h

58

#define mmUVD_MP_SWAP_CNTL 0x3d6f

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h

74

#define mmUVD_MP_SWAP_CNTL 0x3d6f

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h

164

#define mmUVD_MP_SWAP_CNTL 0x056f

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h

578

#define mmUVD_MP_SWAP_CNTL 0x022f

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h

741

#define mmUVD_MP_SWAP_CNTL 0x02c4

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h

1121

#define mmUVD_MP_SWAP_CNTL 0x02c4