drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h

47

#define mmUVD_MASTINT_EN 0x3d40

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h

52

#define mmUVD_MASTINT_EN 0x3D40

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h

47

#define mmUVD_MASTINT_EN 0x3d40

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h

53

#define mmUVD_MASTINT_EN 0x3d40

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h

69

#define mmUVD_MASTINT_EN 0x3d40

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h

152

#define mmUVD_MASTINT_EN 0x0540

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h

330

#define mmUVD_MASTINT_EN 0x0540

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h

538

#define mmUVD_MASTINT_EN 0x0200

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h

533

#define mmUVD_MASTINT_EN 0x00a1

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h

863

#define mmUVD_MASTINT_EN 0x00a1