drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h

52

#define mmUVD_LMI_STATUS 0x3d67

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h

50

#define mmUVD_LMI_STATUS 0x3D67

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h

50

#define mmUVD_LMI_STATUS 0x3d67

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h

56

#define mmUVD_LMI_STATUS 0x3d67

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h

72

#define mmUVD_LMI_STATUS 0x3d67

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h

338

#define mmUVD_LMI_STATUS 0x0567

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h

564

#define mmUVD_LMI_STATUS 0x0227

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h

961

#define mmUVD_LMI_STATUS 0x04a9

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h

1475

#define mmUVD_LMI_STATUS 0x04a9