drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h

51

#define mmUVD_LMI_CTRL 0x3d66

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h

47

#define mmUVD_LMI_CTRL 0x3D66

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h

49

#define mmUVD_LMI_CTRL 0x3d66

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h

55

#define mmUVD_LMI_CTRL 0x3d66

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h

71

#define mmUVD_LMI_CTRL 0x3d66

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h

158

#define mmUVD_LMI_CTRL 0x0566

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h

336

#define mmUVD_LMI_CTRL 0x0566

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h

562

#define mmUVD_LMI_CTRL 0x0226

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h

959

#define mmUVD_LMI_CTRL 0x04a8

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h

1473

#define mmUVD_LMI_CTRL 0x04a8