Symbol: mmUVD_JRBC_RB_WPTR
drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h
126
#define mmUVD_JRBC_RB_WPTR 0x0509
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h
262
#define mmUVD_JRBC_RB_WPTR 0x0509
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h
122
#define mmUVD_JRBC_RB_WPTR 0x0100
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h
137
#define mmUVD_JRBC_RB_WPTR 0x0100
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h
335
#define mmUVD_JRBC_RB_WPTR 0x0100