drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h

41

#define mmUVD_CTX_DATA 0x3d29

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h

39

#define mmUVD_CTX_DATA 0x3D29

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h

41

#define mmUVD_CTX_DATA 0x3d29

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h

47

#define mmUVD_CTX_DATA 0x3d29

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h

63

#define mmUVD_CTX_DATA 0x3d29

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h

142

#define mmUVD_CTX_DATA 0x0529

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h

302

#define mmUVD_CTX_DATA 0x0529

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h

502

#define mmUVD_CTX_DATA 0x01e9

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h

605

#define mmUVD_CTX_DATA 0x00c8

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h

941

#define mmUVD_CTX_DATA 0x00c8