drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5507

#define mmTCP_WATCH1_ADDR_H 0x2043

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

5142

#define mmTCP_WATCH1_ADDR_H 0x2043

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

3003

#define mmTCP_WATCH1_ADDR_H 0x12a3

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

3233

#define mmTCP_WATCH1_ADDR_H 0x12a3

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

3185

#define mmTCP_WATCH1_ADDR_H 0x12a3

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

2135

#define mmTCP_WATCH1_ADDR_H 0x32a3

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

2156

#define mmTCP_WATCH1_ADDR_H 0x32a3

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

2348

#define mmTCP_WATCH1_ADDR_H 0x32a3

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

2327

#define mmTCP_WATCH1_ADDR_H 0x32a3