drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5505

#define mmTCP_WATCH0_CNTL 0x2042

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

5140

#define mmTCP_WATCH0_CNTL 0x2042

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

3001

#define mmTCP_WATCH0_CNTL 0x12a2

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

3231

#define mmTCP_WATCH0_CNTL 0x12a2

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

3183

#define mmTCP_WATCH0_CNTL 0x12a2

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

2142

#define mmTCP_WATCH0_CNTL 0x32a2

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

2163

#define mmTCP_WATCH0_CNTL 0x32a2

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

2355

#define mmTCP_WATCH0_CNTL 0x32a2

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

2334

#define mmTCP_WATCH0_CNTL 0x32a2