drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

2437

#define mmSQ_FIFO_SIZES 0x10a5

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

2526

#define mmSQ_FIFO_SIZES 0x10a5

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

403

#define mmSQ_FIFO_SIZES 0x0305

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

397

#define mmSQ_FIFO_SIZES 0x0305

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

393

#define mmSQ_FIFO_SIZES 0x0305

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

1422

#define mmSQ_FIFO_SIZES 0x2305

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

1790

#define mmSQ_FIFO_SIZES 0x2305

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

1811

#define mmSQ_FIFO_SIZES 0x2305

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

2006

#define mmSQ_FIFO_SIZES 0x2305

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

1974

#define mmSQ_FIFO_SIZES 0x2305