drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

2429

#define mmSQC_CONFIG 0x10a1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

2518

#define mmSQC_CONFIG 0x10a1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

395

#define mmSQC_CONFIG 0x0301

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

389

#define mmSQC_CONFIG 0x0301

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

385

#define mmSQC_CONFIG 0x0301

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

1412

#define mmSQC_CONFIG 0x2301

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

1786

#define mmSQC_CONFIG 0x2301

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

1807

#define mmSQC_CONFIG 0x2301

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

2000

#define mmSQC_CONFIG 0x2301

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

1968

#define mmSQC_CONFIG 0x2301