drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5217

#define mmSPI_RESOURCE_RESERVE_CU_1 0x1f7d

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

4876

#define mmSPI_RESOURCE_RESERVE_CU_1 0x1f7d

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

2735

#define mmSPI_RESOURCE_RESERVE_CU_1 0x11dd

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

2963

#define mmSPI_RESOURCE_RESERVE_CU_1 0x11dd

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

2919

#define mmSPI_RESOURCE_RESERVE_CU_1 0x11dd

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

1432

#define mmSPI_RESOURCE_RESERVE_CU_1 0x31dd

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

1449

#define mmSPI_RESOURCE_RESERVE_CU_1 0x31dd

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

1628

#define mmSPI_RESOURCE_RESERVE_CU_1 0x31dd

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

1596

#define mmSPI_RESOURCE_RESERVE_CU_1 0x31dd