drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

2445

#define mmSH_MEM_BASES 0x10aa

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

2534

#define mmSH_MEM_BASES 0x10aa

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

411

#define mmSH_MEM_BASES 0x030a

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

405

#define mmSH_MEM_BASES 0x030a

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

401

#define mmSH_MEM_BASES 0x030a

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

1942

#define mmSH_MEM_BASES 0x230a

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

1963

#define mmSH_MEM_BASES 0x230a

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

2162

#define mmSH_MEM_BASES 0x230a

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

2130

#define mmSH_MEM_BASES 0x230a