drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

1070

#define mmSDMA1_STATUS_REG 0x0625

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

1112

#define mmSDMA1_STATUS_REG 0x0625

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h

327

#define mmSDMA1_STATUS_REG 0x360d

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h

282

#define mmSDMA1_STATUS_REG 0x360d

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h

341

#define mmSDMA1_STATUS_REG 0x360d

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h

457

#define mmSDMA1_STATUS_REG 0x360d

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h

88

#define mmSDMA1_STATUS_REG 0x0025

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h

88

#define mmSDMA1_STATUS_REG 0x0025

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h

88

#define mmSDMA1_STATUS_REG 0x0025