Symbol: mmSDMA1_RLC5_RB_WPTR_POLL_CNTL
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
1798
#define mmSDMA1_RLC5_RB_WPTR_POLL_CNTL 0x0927
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
1864
#define mmSDMA1_RLC5_RB_WPTR_POLL_CNTL 0x08ef
drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h
804
#define mmSDMA1_RLC5_RB_WPTR_POLL_CNTL 0x02ef
drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h
800
#define mmSDMA1_RLC5_RB_WPTR_POLL_CNTL 0x0327