drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

1470

#define mmSDMA1_RLC1_RB_RPTR_ADDR_LO 0x07a9

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

1516

#define mmSDMA1_RLC1_RB_RPTR_ADDR_LO 0x0791

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h

391

#define mmSDMA1_RLC1_RB_RPTR_ADDR_LO 0x3789

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h

360

#define mmSDMA1_RLC1_RB_RPTR_ADDR_LO 0x3789

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h

471

#define mmSDMA1_RLC1_RB_RPTR_ADDR_LO 0x3789

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h

569

#define mmSDMA1_RLC1_RB_RPTR_ADDR_LO 0x3789

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h

472

#define mmSDMA1_RLC1_RB_RPTR_ADDR_LO 0x01a9

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h

472

#define mmSDMA1_RLC1_RB_RPTR_ADDR_LO 0x0191

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h

468

#define mmSDMA1_RLC1_RB_RPTR_ADDR_LO 0x01a9