drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

1472

#define mmSDMA1_RLC1_IB_CNTL 0x07aa

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

1518

#define mmSDMA1_RLC1_IB_CNTL 0x0792

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h

392

#define mmSDMA1_RLC1_IB_CNTL 0x378a

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h

361

#define mmSDMA1_RLC1_IB_CNTL 0x378a

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h

472

#define mmSDMA1_RLC1_IB_CNTL 0x378a

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h

570

#define mmSDMA1_RLC1_IB_CNTL 0x378a

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h

474

#define mmSDMA1_RLC1_IB_CNTL 0x01aa

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h

474

#define mmSDMA1_RLC1_IB_CNTL 0x0192

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h

470

#define mmSDMA1_RLC1_IB_CNTL 0x01aa