drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

1369

#define mmSDMA1_RLC0_RB_CNTL 0x0740

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

1410

#define mmSDMA1_RLC0_RB_CNTL 0x0730

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h

359

#define mmSDMA1_RLC0_RB_CNTL 0x3700

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h

323

#define mmSDMA1_RLC0_RB_CNTL 0x3700

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h

424

#define mmSDMA1_RLC0_RB_CNTL 0x3700

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h

525

#define mmSDMA1_RLC0_RB_CNTL 0x3700

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h

370

#define mmSDMA1_RLC0_RB_CNTL 0x0140

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h

370

#define mmSDMA1_RLC0_RB_CNTL 0x0130

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h

366

#define mmSDMA1_RLC0_RB_CNTL 0x0140