drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

1389

#define mmSDMA1_RLC0_IB_CNTL 0x074a

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

1430

#define mmSDMA1_RLC0_IB_CNTL 0x073a

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h

369

#define mmSDMA1_RLC0_IB_CNTL 0x370a

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h

333

#define mmSDMA1_RLC0_IB_CNTL 0x370a

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h

434

#define mmSDMA1_RLC0_IB_CNTL 0x370a

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h

535

#define mmSDMA1_RLC0_IB_CNTL 0x370a

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h

390

#define mmSDMA1_RLC0_IB_CNTL 0x014a

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h

390

#define mmSDMA1_RLC0_IB_CNTL 0x013a

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h

386

#define mmSDMA1_RLC0_IB_CNTL 0x014a