drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

1048

#define mmSDMA1_POWER_CNTL 0x061a

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

1090

#define mmSDMA1_POWER_CNTL 0x061a

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h

316

#define mmSDMA1_POWER_CNTL 0x3602

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h

272

#define mmSDMA1_POWER_CNTL 0x3602

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h

331

#define mmSDMA1_POWER_CNTL 0x3602

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h

447

#define mmSDMA1_POWER_CNTL 0x3602

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h

66

#define mmSDMA1_POWER_CNTL 0x001a

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h

66

#define mmSDMA1_POWER_CNTL 0x001a

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h

66

#define mmSDMA1_POWER_CNTL 0x001a