drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

1050

#define mmSDMA1_CLK_CTRL 0x061b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

1092

#define mmSDMA1_CLK_CTRL 0x061b

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h

317

#define mmSDMA1_CLK_CTRL 0x3603

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h

273

#define mmSDMA1_CLK_CTRL 0x3603

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h

332

#define mmSDMA1_CLK_CTRL 0x3603

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h

448

#define mmSDMA1_CLK_CTRL 0x3603

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h

68

#define mmSDMA1_CLK_CTRL 0x001b

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h

68

#define mmSDMA1_CLK_CTRL 0x001b

drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h

68

#define mmSDMA1_CLK_CTRL 0x001b