drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

10507

#define mmSDMA0_UCODE_DATA 0x5881

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

10275

#define mmSDMA0_UCODE_DATA 0x5881

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h

220

#define mmSDMA0_UCODE_DATA 0x3401

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h

158

#define mmSDMA0_UCODE_DATA 0x3401

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h

155

#define mmSDMA0_UCODE_DATA 0x3401

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h

292

#define mmSDMA0_UCODE_DATA 0x3401

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h

30

#define mmSDMA0_UCODE_DATA 0x0001

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h

30

#define mmSDMA0_UCODE_DATA 0x0001

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h

30

#define mmSDMA0_UCODE_DATA 0x0001

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h

30

#define mmSDMA0_UCODE_DATA 0x0001