Symbol: mmSDMA0_RLC0_RB_WPTR_HI
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
382
#define mmSDMA0_RLC0_RB_WPTR_HI 0x0146
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
380
#define mmSDMA0_RLC0_RB_WPTR_HI 0x0136
drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h
390
#define mmSDMA0_RLC0_RB_WPTR_HI 0x0146
drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h
302
#define mmSDMA0_RLC0_RB_WPTR_HI 0x0146
drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h
390
#define mmSDMA0_RLC0_RB_WPTR_HI 0x0136
drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h
386
#define mmSDMA0_RLC0_RB_WPTR_HI 0x0146