drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

370

#define mmSDMA0_RLC0_RB_CNTL 0x0140

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

368

#define mmSDMA0_RLC0_RB_CNTL 0x0130

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h

268

#define mmSDMA0_RLC0_RB_CNTL 0x3500

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h

214

#define mmSDMA0_RLC0_RB_CNTL 0x3500

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h

253

#define mmSDMA0_RLC0_RB_CNTL 0x3500

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h

375

#define mmSDMA0_RLC0_RB_CNTL 0x3500

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h

378

#define mmSDMA0_RLC0_RB_CNTL 0x0140

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h

290

#define mmSDMA0_RLC0_RB_CNTL 0x0140

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h

378

#define mmSDMA0_RLC0_RB_CNTL 0x0130

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h

374

#define mmSDMA0_RLC0_RB_CNTL 0x0140