drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

374

#define mmSDMA0_RLC0_RB_BASE_HI 0x0142

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

372

#define mmSDMA0_RLC0_RB_BASE_HI 0x0132

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h

270

#define mmSDMA0_RLC0_RB_BASE_HI 0x3502

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h

216

#define mmSDMA0_RLC0_RB_BASE_HI 0x3502

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h

255

#define mmSDMA0_RLC0_RB_BASE_HI 0x3502

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h

377

#define mmSDMA0_RLC0_RB_BASE_HI 0x3502

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h

382

#define mmSDMA0_RLC0_RB_BASE_HI 0x0142

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h

294

#define mmSDMA0_RLC0_RB_BASE_HI 0x0142

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h

382

#define mmSDMA0_RLC0_RB_BASE_HI 0x0132

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h

378

#define mmSDMA0_RLC0_RB_BASE_HI 0x0142