drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

212

#define mmSDMA0_GFX_RB_WPTR 0x0085

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

200

#define mmSDMA0_GFX_RB_WPTR 0x0085

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h

250

#define mmSDMA0_GFX_RB_WPTR 0x3484

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h

191

#define mmSDMA0_GFX_RB_WPTR 0x3484

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h

218

#define mmSDMA0_GFX_RB_WPTR 0x3484

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h

343

#define mmSDMA0_GFX_RB_WPTR 0x3484

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h

218

#define mmSDMA0_GFX_RB_WPTR 0x0085

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h

214

#define mmSDMA0_GFX_RB_WPTR 0x0085

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h

218

#define mmSDMA0_GFX_RB_WPTR 0x0085

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h

214

#define mmSDMA0_GFX_RB_WPTR 0x0085