drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

43

#define mmSDMA0_CLK_CTRL 0x001b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

50

#define mmSDMA0_CLK_CTRL 0x001b

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h

222

#define mmSDMA0_CLK_CTRL 0x3403

drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h

160

#define mmSDMA0_CLK_CTRL 0x3403

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h

157

#define mmSDMA0_CLK_CTRL 0x3403

drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h

294

#define mmSDMA0_CLK_CTRL 0x3403

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h

68

#define mmSDMA0_CLK_CTRL 0x001b

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h

66

#define mmSDMA0_CLK_CTRL 0x001b

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h

68

#define mmSDMA0_CLK_CTRL 0x001b

drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h

68

#define mmSDMA0_CLK_CTRL 0x001b