Symbol: mmRLC_UTCL1_STATUS
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
9615
#define mmRLC_UTCL1_STATUS 0x4cd4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
9461
#define mmRLC_UTCL1_STATUS 0x4cd4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
6281
#define mmRLC_UTCL1_STATUS 0x4cd4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
6503
#define mmRLC_UTCL1_STATUS 0x4cd4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
6479
#define mmRLC_UTCL1_STATUS 0x4cd4