drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

9297

#define mmRLC_STAT 0x4c04

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

9107

#define mmRLC_STAT 0x4c04

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

5965

#define mmRLC_STAT 0x4c04

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

6187

#define mmRLC_STAT 0x4c04

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

6151

#define mmRLC_STAT 0x4c04

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

1177

#define mmRLC_STAT 0x30D3

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

1244

#define mmRLC_STAT 0x30c4

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

1257

#define mmRLC_STAT 0x30c4

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

1346

#define mmRLC_STAT 0xec04

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

1349

#define mmRLC_STAT 0xec04