drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

9409

#define mmRLC_LB_PARAMS 0x4c51

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

9245

#define mmRLC_LB_PARAMS 0x4c51

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

6061

#define mmRLC_LB_PARAMS 0x4c51

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

6283

#define mmRLC_LB_PARAMS 0x4c51

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

6259

#define mmRLC_LB_PARAMS 0x4c51

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

1152

#define mmRLC_LB_PARAMS 0x3109

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

1289

#define mmRLC_LB_PARAMS 0x3111

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

1302

#define mmRLC_LB_PARAMS 0x3111

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

1402

#define mmRLC_LB_PARAMS 0xec51

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

1402

#define mmRLC_LB_PARAMS 0xec51