drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

6007

#define mmRLC_LB_CNTR_INIT 0x4c1b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

6229

#define mmRLC_LB_CNTR_INIT 0x4c1b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

6193

#define mmRLC_LB_CNTR_INIT 0x4c1b

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

1149

#define mmRLC_LB_CNTR_INIT 0x30C6

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

1258

#define mmRLC_LB_CNTR_INIT 0x30db

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

1271

#define mmRLC_LB_CNTR_INIT 0x30db

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

1365

#define mmRLC_LB_CNTR_INIT 0xec1b

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

1368

#define mmRLC_LB_CNTR_INIT 0xec1b