drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

9475

#define mmRLC_GPR_REG2 0x4c7a

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

9311

#define mmRLC_GPR_REG2 0x4c7a

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

6129

#define mmRLC_GPR_REG2 0x4c7a

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

6351

#define mmRLC_GPR_REG2 0x4c7a

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

6329

#define mmRLC_GPR_REG2 0x4c7a

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

1322

#define mmRLC_GPR_REG2 0x313a

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

1335

#define mmRLC_GPR_REG2 0x313a

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

1435

#define mmRLC_GPR_REG2 0xec7a

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

1432

#define mmRLC_GPR_REG2 0xec7a