Symbol: mmRLC_GPM_UTCL1_CNTL_2
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
9559
#define mmRLC_GPM_UTCL1_CNTL_2 0x4cb4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
9409
#define mmRLC_GPM_UTCL1_CNTL_2 0x4cb4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
6223
#define mmRLC_GPM_UTCL1_CNTL_2 0x4cb4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
6445
#define mmRLC_GPM_UTCL1_CNTL_2 0x4cb4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
6421
#define mmRLC_GPM_UTCL1_CNTL_2 0x4cb4