Symbol: mmRLC_GPM_UTCL1_CNTL_1
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
9557
#define mmRLC_GPM_UTCL1_CNTL_1 0x4cb3
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
9407
#define mmRLC_GPM_UTCL1_CNTL_1 0x4cb3
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
6221
#define mmRLC_GPM_UTCL1_CNTL_1 0x4cb3
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
6443
#define mmRLC_GPM_UTCL1_CNTL_1 0x4cb3
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
6419
#define mmRLC_GPM_UTCL1_CNTL_1 0x4cb3