Symbol: mmRLC_GPM_UTCL1_CNTL_0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
9555
#define mmRLC_GPM_UTCL1_CNTL_0 0x4cb2
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
9405
#define mmRLC_GPM_UTCL1_CNTL_0 0x4cb2
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
6219
#define mmRLC_GPM_UTCL1_CNTL_0 0x4cb2
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
6441
#define mmRLC_GPM_UTCL1_CNTL_0 0x4cb2
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
6417
#define mmRLC_GPM_UTCL1_CNTL_0 0x4cb2