drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

6485

#define mmPA_SC_MODE_CNTL_1 0x0293

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

6118

#define mmPA_SC_MODE_CNTL_1 0x0293

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

4091

#define mmPA_SC_MODE_CNTL_1 0x0293

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

4321

#define mmPA_SC_MODE_CNTL_1 0x0293

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

4275

#define mmPA_SC_MODE_CNTL_1 0x0293

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

978

#define mmPA_SC_MODE_CNTL_1 0xA293

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

1018

#define mmPA_SC_MODE_CNTL_1 0xa293

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

1031

#define mmPA_SC_MODE_CNTL_1 0xa293

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

1113

#define mmPA_SC_MODE_CNTL_1 0xa293

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

1114

#define mmPA_SC_MODE_CNTL_1 0xa293