drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

2359

#define mmPA_CL_CNTL_STATUS 0x1024

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

2446

#define mmPA_CL_CNTL_STATUS 0x1024

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

333

#define mmPA_CL_CNTL_STATUS 0x0284

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

329

#define mmPA_CL_CNTL_STATUS 0x0284

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

323

#define mmPA_CL_CNTL_STATUS 0x0284

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

801

#define mmPA_CL_CNTL_STATUS 0x2284

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

1145

#define mmPA_CL_CNTL_STATUS 0x2284

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

1158

#define mmPA_CL_CNTL_STATUS 0x2284

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

1240

#define mmPA_CL_CNTL_STATUS 0x2284

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

1243

#define mmPA_CL_CNTL_STATUS 0x2284