Symbol: mmMP1_SMN_IH_SW_INT
drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h
328
#define mmMP1_SMN_IH_SW_INT 0x02c2
drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_8_offset.h
328
#define mmMP1_SMN_IH_SW_INT 0x02c2
drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h
332
#define mmMP1_SMN_IH_SW_INT 0x02c2
drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_5_0_offset.h
376
#define mmMP1_SMN_IH_SW_INT 0x02c2
drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h
328
#define mmMP1_SMN_IH_SW_INT 0x02c2
drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h
342
#define mmMP1_SMN_IH_SW_INT 0x02c2