drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5563

#define mmGDS_VMID5_BASE 0x20aa

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

5192

#define mmGDS_VMID5_BASE 0x20aa

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

3063

#define mmGDS_VMID5_BASE 0x130a

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

3293

#define mmGDS_VMID5_BASE 0x130a

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

3243

#define mmGDS_VMID5_BASE 0x130a

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

2222

#define mmGDS_VMID5_BASE 0x330a

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

2244

#define mmGDS_VMID5_BASE 0x330a

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

2442

#define mmGDS_VMID5_BASE 0x330a

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

2421

#define mmGDS_VMID5_BASE 0x330a